Only in xf86-video-sis-0.9.3-4.z1/man: sis.4 diff -urp -X dontdiff xf86-video-sis-0.9.3-4/src/init301.c xf86-video-sis-0.9.3-4.z1/src/init301.c --- xf86-video-sis-0.9.3-4/src/init301.c 2006-11-30 06:09:43.000000000 -0800 +++ xf86-video-sis-0.9.3-4.z1/src/init301.c 2007-12-07 19:23:14.000000000 -0800 @@ -932,7 +932,7 @@ SiS_SetChrontelGPIO(struct SiS_Private * #ifdef SIS_LINUX_KERNEL acpibase = sisfb_read_lpc_pci_dword(SiS_Pr, 0x74); #else - acpibase = pciReadLong(0x00000800, 0x74); + acpibase = SIS_PCI_READ_LONG_PR(SiS_Pr, 0x74); #endif acpibase &= 0xFFFF; if(!acpibase) return; @@ -5220,8 +5220,8 @@ SiS_SetCRT2FIFO_300(struct SiS_Private * pci50 = sisfb_read_nbridge_pci_dword(SiS_Pr, 0x50); pciA0 = sisfb_read_nbridge_pci_dword(SiS_Pr, 0xa0); #else - pci50 = pciReadLong(0x00000000, 0x50); - pciA0 = pciReadLong(0x00000000, 0xA0); + pci50 = SIS_PCI_READ_LONG_PR(SiS_Pr, 0x50); + pciA0 = SIS_PCI_READ_LONG_PR(SiS_Pr, 0xA0); #endif if(SiS_Pr->ChipType == SIS_730) { diff -urp -X dontdiff xf86-video-sis-0.9.3-4/src/init.c xf86-video-sis-0.9.3-4.z1/src/init.c --- xf86-video-sis-0.9.3-4/src/init.c 2006-11-30 06:09:43.000000000 -0800 +++ xf86-video-sis-0.9.3-4.z1/src/init.c 2007-12-07 19:39:15.000000000 -0800 @@ -2505,7 +2505,7 @@ SiS_SetCRT1FIFO_630(struct SiS_Private * #ifdef SIS_LINUX_KERNEL templ = sisfb_read_nbridge_pci_dword(SiS_Pr, 0x50); #else - templ = pciReadLong(0x00000000, 0x50); + templ = SIS_PCI_READ_LONG_PR(SiS_Pr, 0x50); #endif if(SiS_Pr->ChipType == SIS_730) { @@ -2530,8 +2530,8 @@ SiS_SetCRT1FIFO_630(struct SiS_Private * sisfb_write_nbridge_pci_dword(SiS_Pr, 0x50, templ); templ = sisfb_read_nbridge_pci_dword(SiS_Pr, 0xA0); #else - pciWriteLong(0x00000000, 0x50, templ); - templ = pciReadLong(0x00000000, 0xA0); + SIS_PCI_WRITE_LONG_PR(SiS_Pr, 0x50, templ); + templ = SIS_PCI_READ_LONG_PR(SiS_Pr, 0xA0); #endif /* GUI grant timer (PCI config 0xA3) */ @@ -2551,7 +2551,7 @@ SiS_SetCRT1FIFO_630(struct SiS_Private * #ifdef SIS_LINUX_KERNEL sisfb_write_nbridge_pci_dword(SiS_Pr, 0xA0, templ); #else - pciWriteLong(0x00000000, 0xA0, templ); + SIS_PCI_WRITE_LONG_PR(SiS_Pr, 0xA0, templ); #endif } #endif /* SIS300 */ @@ -3169,7 +3169,7 @@ SiS_Handle760(struct SiS_Private *SiS_Pr #ifdef SIS_LINUX_KERNEL somebase = sisfb_read_mio_pci_word(SiS_Pr, 0x74); #else - somebase = pciReadWord(0x00001000, 0x74); + somebase = SIS_PCI_READ_WORD_PR(SiS_Pr, 0x74); #endif somebase &= 0xffff; @@ -3190,8 +3190,8 @@ SiS_Handle760(struct SiS_Private *SiS_Pr sisfb_write_nbridge_pci_byte(SiS_Pr, 0x7e, temp1); sisfb_write_nbridge_pci_byte(SiS_Pr, 0x8d, temp2); #else - pciWriteByte(0x00000000, 0x7e, temp1); - pciWriteByte(0x00000000, 0x8d, temp2); + SIS_PCI_WRITE_BYTE_PR(SiS_Pr, 0x7e, temp1); + SIS_PCI_WRITE_BYTE_PR(SiS_Pr, 0x8d, temp2); #endif SiS_SetRegByte((somebase + 0x85), temp3); Only in xf86-video-sis-0.9.3-4.z1/src/.libs: sis_drv.la Only in xf86-video-sis-0.9.3-4.z1/src/.libs: sis_drv.lai Only in xf86-video-sis-0.9.3-4.z1/src/.libs: sis_drv.so diff -urp -X dontdiff xf86-video-sis-0.9.3-4/src/sis_dac.c xf86-video-sis-0.9.3-4.z1/src/sis_dac.c --- xf86-video-sis-0.9.3-4/src/sis_dac.c 2006-11-30 06:09:43.000000000 -0800 +++ xf86-video-sis-0.9.3-4.z1/src/sis_dac.c 2007-12-07 19:40:40.000000000 -0800 @@ -545,8 +545,8 @@ SiS300Save(ScrnInfoPtr pScrn, SISRegPtr /* Save FQBQ and GUI timer settings */ if(pSiS->Chipset == PCI_CHIP_SIS630) { - sisReg->sisRegsPCI50 = pciReadLong(0x00000000, 0x50); - sisReg->sisRegsPCIA0 = pciReadLong(0x00000000, 0xA0); + sisReg->sisRegsPCI50 = SIS_PCI_READ_LONG(pSiS->PciInfo, 0x50); + sisReg->sisRegsPCIA0 = SIS_PCI_READ_LONG(pSiS->PciInfo, 0xA0); #ifdef TWDEBUG xf86DrvMsg(pScrn->scrnIndex, X_INFO, "PCI Config 50 = %lx\n", sisReg->sisRegsPCI50); @@ -687,9 +687,9 @@ SiS300Restore(ScrnInfoPtr pScrn, SISRegP /* Restore FQBQ and GUI timer settings */ if(pSiS->Chipset == PCI_CHIP_SIS630) { - temp1 = pciReadLong(0x00000000, 0x50); - temp2 = pciReadLong(0x00000000, 0xA0); - if(pciReadLong(0x00000000, 0x00) == 0x06301039) { + temp1 = SIS_PCI_READ_LONG(pSiS->PciInfo, 0x50); + temp2 = SIS_PCI_READ_LONG(pSiS->PciInfo, 0xA0); + if(SIS_PCI_READ_LONG(pSiS->PciInfo, 0x00) == 0x06301039) { temp1 &= 0xf0ffffff; temp1 |= (sisReg->sisRegsPCI50 & ~0xf0ffffff); temp2 &= 0xf0ffffff; @@ -700,8 +700,8 @@ SiS300Restore(ScrnInfoPtr pScrn, SISRegP temp2 &= 0x00ffffff; temp2 |= (sisReg->sisRegsPCIA0 & ~0x00ffffff); } - pciWriteLong(0x00000000, 0x50, temp1); - pciWriteLong(0x00000000, 0xA0, temp2); + SIS_PCI_WRITE_LONG(pSiS->PciInfo, 0x50, temp1); + SIS_PCI_WRITE_LONG(pSiS->PciInfo, 0xA0, temp2); } /* Restore panel link/video bridge registers */ diff -urp -X dontdiff xf86-video-sis-0.9.3-4/src/sis_dri.c xf86-video-sis-0.9.3-4.z1/src/sis_dri.c --- xf86-video-sis-0.9.3-4/src/sis_dri.c 2007-12-01 20:17:49.000000000 -0800 +++ xf86-video-sis-0.9.3-4.z1/src/sis_dri.c 2007-12-14 19:24:28.000000000 -0800 @@ -58,17 +58,6 @@ extern Bool drmSiSAgpInit(int driSubFD, # endif #endif -#ifdef XORG_VERSION_CURRENT -#define SISHAVECREATEBUSID -#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(6,7,99,1,0) -extern char *DRICreatePCIBusID(pciVideoPtr PciInfo); -#endif -#else -# if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,4,99,9,0) -# undef SISHAVECREATEBUSID -# endif -#endif - #if XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,3,0,0,0) #include "sis_common.h" #endif diff -urp -X dontdiff xf86-video-sis-0.9.3-4/src/sis_dri.h xf86-video-sis-0.9.3-4.z1/src/sis_dri.h --- xf86-video-sis-0.9.3-4/src/sis_dri.h 2006-11-30 06:09:43.000000000 -0800 +++ xf86-video-sis-0.9.3-4.z1/src/sis_dri.h 2007-12-14 19:24:17.000000000 -0800 @@ -115,7 +115,7 @@ typedef struct { int dummy; } SISDRIContextRec, *SISDRIContextPtr; -#ifdef XFree86Server +/* #ifdef XFree86Server */ /* XXX The alternative is... what? */ #include "screenint.h" @@ -123,5 +123,5 @@ Bool SISDRIScreenInit(ScreenPtr pScreen) void SISDRICloseScreen(ScreenPtr pScreen); Bool SISDRIFinishScreenInit(ScreenPtr pScreen); -#endif +/* #endif */ #endif diff -urp -X dontdiff xf86-video-sis-0.9.3-4/src/sis_driver.c xf86-video-sis-0.9.3-4.z1/src/sis_driver.c --- xf86-video-sis-0.9.3-4/src/sis_driver.c 2006-11-30 06:09:43.000000000 -0800 +++ xf86-video-sis-0.9.3-4.z1/src/sis_driver.c 2007-12-07 20:51:08.000000000 -0800 @@ -555,7 +555,7 @@ SiS_SiSFB_Lock(ScrnInfoPtr pScrn, Bool l if(!pSiS->sisfbfound) return; if(!pSiS->sisfb_havelock) return; - if((fd = open(pSiS->sisfbdevname, 'r')) != -1) { + if((fd = open(pSiS->sisfbdevname, O_RDWR)) != -1) { parm = lock ? 1 : 0; ioctl(fd, SISFB_SET_LOCK, &parm); close(fd); @@ -610,6 +610,8 @@ SISProbe(DriverPtr drv, int flags) * file info to override any contradictions. */ +/* XXX Someone please explain me this. It returns a pointer to a static. */ +#if !defined(XSERVER_LIBPCIACCESS) /* * All of the cards this driver supports are PCI, so the "probing" just * amounts to checking the PCI data that the server has already collected. @@ -621,6 +623,7 @@ SISProbe(DriverPtr drv, int flags) */ return FALSE; } +#endif numUsedSiS = xf86MatchPciInstances(SIS_NAME, PCI_VENDOR_SIS, SISChipsets, SISPciChipsets, devSections, @@ -2983,7 +2986,7 @@ SiS_MapVGAMem(ScrnInfoPtr pScrn) /* If card is secondary or if a0000-address decoding * is disabled, set Phys to beginning of our video RAM. */ - pSiS->VGAMapPhys = pSiS->PciInfo->memBase[0]; + pSiS->VGAMapPhys = SIS_PCI_FBPHYS(pSiS->PciInfo); /* XXX Why not masked? */ } if(!SiSVGAMapMem(pScrn)) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, @@ -3032,7 +3035,7 @@ SiS_CheckKernelFB(ScrnInfoPtr pScrn) sprintf(name, "/dev/fb/%1d", (i - 8)); } - if((fd = open(name, 'r')) != -1) { + if((fd = open(name, O_RDWR)) != -1) { Bool gotit = FALSE; @@ -3380,10 +3383,12 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) /* Find the PCI info for this screen */ pSiS->PciInfo = xf86GetPciInfoForEntity(pSiS->pEnt->index); - pSiS->PciBus = ((pciConfigPtr)pSiS->PciInfo->thisCard)->busnum; /*SIS_PCI_BUS(pSiS->PciInfo);*/ - pSiS->PciDevice = ((pciConfigPtr)pSiS->PciInfo->thisCard)->devnum; /*SIS_PCI_DEVICE(pSiS->PciInfo);*/ - pSiS->PciFunc = ((pciConfigPtr)pSiS->PciInfo->thisCard)->funcnum; /*SIS_PCI_FUNC(pSiS->PciInfo);*/ + pSiS->PciBus = SIS_PCI_BUS(pSiS->PciInfo); + pSiS->PciDevice = SIS_PCI_DEVICE(pSiS->PciInfo); + pSiS->PciFunc = SIS_PCI_FUNC(pSiS->PciInfo); +#if !defined(XSERVER_LIBPCIACCESS) pSiS->PciTag = ((pciConfigPtr)pSiS->PciInfo->thisCard)->tag; /*SIS_PCI_TAG(pSiS->PciInfo);*/ +#endif #ifdef SIS_NEED_MAP_IOP /********************************************/ @@ -3403,7 +3408,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) /* we have our own vgaHW routines. However, */ /* we use /dev/port for now instead.) */ /********************************************/ - pSiS->IOPAddress = pSiS->IODBase + pSiS->PciInfo->ioBase[2]; + pSiS->IOPAddress = pSiS->IODBase + SIS_PCI_IOPORTS(pSiS->PciInfo); if(!SISMapIOPMem(pScrn)) { SISErrorLog(pScrn, "Could not map I/O port area at 0x%x\n", pSiS->IOPAddress); goto my_error_0; @@ -3433,7 +3438,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) { SymTabRec *myChipsets = SISChipsets; - if(pSiS->PciInfo->vendor == PCI_VENDOR_XGI) { + if(SIS_PCI_VENDOR_ID(pSiS->PciInfo) == PCI_VENDOR_XGI) { myChipsets = XGIChipsets; } @@ -3451,7 +3456,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) pSiS->Chipset); } else { - pSiS->Chipset = pSiS->PciInfo->chipType; + pSiS->Chipset = SIS_PCI_DEVICE_ID(pSiS->PciInfo); pScrn->chipset = (char *)xf86TokenToString(myChipsets, pSiS->Chipset); } @@ -3464,7 +3469,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) pSiS->ChipRev); } else { - pSiS->ChipRev = pSiS->PciInfo->chipRev; + pSiS->ChipRev = SIS_PCI_CHIP_REV(pSiS->PciInfo); } @@ -3648,7 +3653,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) * by the BIOS. So we can pretty much rely on that these * are enabled. */ - pSiS->RelIO = (SISIOADDRESS)(pSiS->PciInfo->ioBase[2] + pSiS->IODBase); + pSiS->RelIO = (SISIOADDRESS)(SIS_PCI_IOPORTS(pSiS->PciInfo) + pSiS->IODBase); xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Relocated I/O registers at 0x%lX\n", (ULong)pSiS->RelIO); @@ -3769,7 +3774,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) break; case PCI_CHIP_SIS630: /* 630 + 730 */ pSiS->ChipType = SIS_630; - if(pciReadLong(0x00000000, 0x00) == 0x07301039) { + if(SIS_PCI_READ_LONG(pSiS->PciInfo, 0x00) == 0x07301039) { pSiS->ChipType = SIS_730; } pSiS->SiS_SD_Flags |= SiS_SD_IS300SERIES; @@ -3808,7 +3813,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) break; case PCI_CHIP_SIS650: /* 650 + 740 */ pSiS->ChipType = SIS_650; - if(pciReadLong(0x00000000, 0x00) == 0x07401039) { + if(SIS_PCI_READ_LONG(pSiS->PciInfo, 0x00) == 0x07401039) { pSiS->ChipType = SIS_740; } pSiS->ChipFlags |= (SiSCF_Integrated | SiSCF_Real256ECore | SiSCF_MMIOPalette); @@ -3826,7 +3831,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) break; case PCI_CHIP_SIS660: /* 660, 661, 741, 760, 761, 670(?) */ { - ULong hpciid = pciReadLong(0x00000000, 0x00); + ULong hpciid = SIS_PCI_READ_LONG(pSiS->PciInfo, 0x00); switch(hpciid) { case 0x06601039: pSiS->ChipType = SIS_660; @@ -4007,7 +4012,11 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) if(pSiSEnt) pSiSEnt->SiS_Pr = pSiS->SiS_Pr; #endif memset(pSiS->SiS_Pr, 0, sizeof(struct SiS_Private)); +#if XSERVER_LIBPCIACCESS + pSiS->SiS_Pr->pdev = pSiS->PciInfo; +#else pSiS->SiS_Pr->PciTag = pSiS->PciTag; +#endif pSiS->SiS_Pr->ChipType = pSiS->ChipType; pSiS->SiS_Pr->ChipRevision = pSiS->ChipRev; pSiS->SiS_Pr->SiS_Backup70xx = 0xff; @@ -4067,7 +4076,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) case PCI_CHIP_SIS6326: pSiS->oldChipset = OC_SIS6326; break; case PCI_CHIP_SIS530: - if(pciReadLong(0x00000000, 0x00) == 0x06201039) { + if(SIS_PCI_READ_LONG(pSiS->PciInfo, 0x00) == 0x06201039) { pSiS->oldChipset = OC_SIS620; } else { if((pSiS->ChipRev & 0x0f) < 0x0a) @@ -4214,7 +4223,6 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Could not allocate memory for video BIOS image\n"); } else { - ULong segstart; UShort mypciid = pSiS->Chipset; UShort mypcivendor = (pSiS->ChipFlags & SiSCF_IsXGI) ? PCI_VENDOR_XGI : PCI_VENDOR_SIS; Bool found = FALSE, readpci = FALSE; @@ -4238,6 +4246,16 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) break; } +#if XSERVER_LIBPCIACCESS + if(readpci) { + pSiS->PciInfo->rom_size = biossize; + pci_device_read_rom(pSiS->PciInfo, pSiS->BIOS); + if(SISCheckBIOS(pSiS, mypciid, mypcivendor, biossize)) { + found = TRUE; + } + } + +#else if(readpci) { xf86ReadPciBIOS(0, pSiS->PciTag, 0, pSiS->BIOS, biossize); if(SISCheckBIOS(pSiS, mypciid, mypcivendor, biossize)) { @@ -4246,6 +4264,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) } if(!found) { + ULong segstart; for(segstart = BIOS_BASE; segstart < 0x000f0000; segstart += 0x00001000) { #if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0) @@ -4260,6 +4279,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) break; } } +#endif /* XSERVER_LIBPCIACCESS */ if(found) { UShort romptr = pSiS->BIOS[0x16] | (pSiS->BIOS[0x17] << 8); @@ -4522,7 +4542,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) pSiS->FbAddress = pSiS->pEnt->device->MemBase; from = X_CONFIG; } else { - pSiS->FbAddress = pSiS->PciInfo->memBase[0] & 0xFFFFFFF0; + pSiS->FbAddress = SIS_PCI_FBPHYS(pSiS->PciInfo) & 0xFFFFFFF0; from = X_PROBED; } @@ -4546,7 +4566,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) pSiS->IOAddress = pSiS->pEnt->device->IOBase; from = X_CONFIG; } else { - pSiS->IOAddress = pSiS->PciInfo->memBase[1] & 0xFFFFFFF0; + pSiS->IOAddress = SIS_PCI_IOPHYS(pSiS->PciInfo) & 0xFFFFFFF0; from = X_PROBED; } xf86DrvMsg(pScrn->scrnIndex, from, "MMIO registers at 0x%lX (size %ldK)\n", @@ -5064,15 +5084,15 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) if(pSiS->Chipset == PCI_CHIP_SIS630) { int i = 0; do { - if(mychswtable[i].subsysVendor == pSiS->PciInfo->subsysVendor && - mychswtable[i].subsysCard == pSiS->PciInfo->subsysCard) { + if(mychswtable[i].subsysVendor == SIS_PCI_SUBVEND_ID(pSiS->PciInfo) && + mychswtable[i].subsysCard == SIS_PCI_SUBDEV_ID(pSiS->PciInfo)) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "PCI subsystem ID found in list for Chrontel/GPIO setup:\n"); xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "\tVendor/Card: %s %s (ID %04x)\n", mychswtable[i].vendorName, mychswtable[i].cardName, - pSiS->PciInfo->subsysCard); + SIS_PCI_SUBDEV_ID(pSiS->PciInfo)); pSiS->SiS_Pr->SiS_ChSW = TRUE; break; } @@ -5105,8 +5125,8 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) ((!SiS_customttable[i].bioschksum) || (pSiS->SiS_Pr->UseROM && (SiS_customttable[i].bioschksum == chksum))) && - (SiS_customttable[i].pcisubsysvendor == pSiS->PciInfo->subsysVendor) && - (SiS_customttable[i].pcisubsyscard == pSiS->PciInfo->subsysCard) ) { + (SiS_customttable[i].pcisubsysvendor == SIS_PCI_SUBVEND_ID(pSiS->PciInfo)) && + (SiS_customttable[i].pcisubsyscard == SIS_PCI_SUBDEV_ID(pSiS->PciInfo)) ) { footprint = TRUE; for(j=0; j<5; j++) { if(SiS_customttable[i].biosFootprintAddr[j]) { @@ -5834,14 +5854,14 @@ SISPreInit(ScrnInfoPtr pScrn, int flags) if(pSiS->SiS_Pr->PDC == -1) { int i=0; do { - if(mypdctable[i].subsysVendor == pSiS->PciInfo->subsysVendor && - mypdctable[i].subsysCard == pSiS->PciInfo->subsysCard) { + if(mypdctable[i].subsysVendor == SIS_PCI_SUBVEND_ID(pSiS->PciInfo) && + mypdctable[i].subsysCard == SIS_PCI_SUBDEV_ID(pSiS->PciInfo)) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "PCI card/vendor identified for non-default PanelDelayCompensation\n"); xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Vendor: %s, card: %s (ID %04x), PanelDelayCompensation: 0x%02x\n", mypdctable[i].vendorName, mypdctable[i].cardName, - pSiS->PciInfo->subsysCard, mypdctable[i].pdc); + SIS_PCI_SUBDEV_ID(pSiS->PciInfo), mypdctable[i].pdc); if(pSiS->PDC == -1) { pSiS->PDC = mypdctable[i].pdc; } else { @@ -7131,11 +7151,16 @@ my_error_0: /* * Map I/O port area for non-PC platforms + * XXX This was broken before libpciaccess, mmioFlags is undefined */ #ifdef SIS_NEED_MAP_IOP static Bool SISMapIOPMem(ScrnInfoPtr pScrn) { +#if XSERVER_LIBPCIACCESS + int err; +#endif + SISPtr pSiS = SISPTR(pScrn); #ifdef SISDUALHEAD SISEntPtr pSiSEnt = pSiS->entityPrivate; @@ -7144,23 +7169,84 @@ SISMapIOPMem(ScrnInfoPtr pScrn) pSiSEnt->MapCountIOPBase++; if(!(pSiSEnt->IOPBase)) { /* Only map if not mapped previously */ +#if XSERVER_LIBPCIACCESS + err = pci_device_map_range(pSiS->PciInfo, pSiS->IOPAddress, 128, + PCI_DEV_MAP_FLAG_WRITABLE, &pSiSEnt->IOPBase); + if(err) { + SISErrorLog(pScrn, "Could not map I/O port area (%d)\n", err); + return FALSE; + } +#else pSiSEnt->IOPBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO, pSiS->PciTag, pSiS->IOPAddress, 128); +#endif } pSiS->IOPBase = pSiSEnt->IOPBase; - } else + if(pSiS->IOPBase == NULL) { + SISErrorLog(pScrn, "Could not map I/O port area\n"); + return FALSE; + } + return TRUE; + } #endif + +#if XSERVER_LIBPCIACCESS + err = pci_device_map_range(pSiS->PciInfo, pSiS->IOPAddress, 128, + PCI_DEV_MAP_FLAG_WRITABLE, &pSiS->IOPBase); + if(err) { + SISErrorLog(pScrn, "Could not map I/O port area (%d)\n", err); + return FALSE; + } +#else pSiS->IOPBase = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pSiS->PciTag, pSiS->IOPAddress, 128); - if(pSiS->IOPBase == NULL) { SISErrorLog(pScrn, "Could not map I/O port area\n"); return FALSE; } +#endif + + return TRUE; +} +#if XSERVER_LIBPCIACCESS + +static Bool +SISUnmapIOPMem(ScrnInfoPtr pScrn) +{ + SISPtr pSiS = SISPTR(pScrn); + + /* + * In dual head mode, we must not unmap if the other head still + * assumes memory as mapped + */ +#ifdef SISDUALHEAD + if(pSiS->DualHeadMode) { + SISEntPtr pSiSEnt = pSiS->entityPrivate; + + if(pSiSEnt->MapCountIOPBase) { + pSiSEnt->MapCountIOPBase--; + if((pSiSEnt->MapCountIOPBase == 0) || (pSiSEnt->forceUnmapIOPBase)) { + pci_device_unmap_range(pSiS->PciInfo, pSiSEnt->IOPBase, 2048); + pSiSEnt->IOPBase = NULL; + pSiSEnt->MapCountIOPBase = 0; + pSiSEnt->forceUnmapIOPBase = FALSE; + } + pSiS->IOPBase = NULL; + } + } else { + pci_device_unmap_range(pSiS->PciInfo, pSiS->IOPBase, 2048); + pSiS->IOPBase = NULL; + } +#else + pci_device_unmap_range(pSiS->PciInfo, pSiS->IOPBase, 2048); + pSiS->IOPBase = NULL; +#endif return TRUE; } +#else + static Bool SISUnmapIOPMem(ScrnInfoPtr pScrn) { @@ -7193,50 +7279,135 @@ SISUnmapIOPMem(ScrnInfoPtr pScrn) #endif return TRUE; } -#endif +#endif /* XSERVER_LIBPCIACCESS */ + +#endif /* SIS_NEED_MAP_IOP */ /* * Map the framebuffer and MMIO memory */ -static Bool -SISMapMem(ScrnInfoPtr pScrn) +/* Map IO registers to virtual address space */ +static UChar *SISMapMem_mmio(SISPtr pSiS) { - SISPtr pSiS = SISPTR(pScrn); - int mmioFlags = VIDMEM_MMIO; #ifdef SISDUALHEAD SISEntPtr pSiSEnt = pSiS->entityPrivate; #endif +#if XSERVER_LIBPCIACCESS + int err; + void *vaddr; +#else + int mmioFlags = VIDMEM_MMIO; +#endif /* - * Map IO registers to virtual address space * (For Alpha, we need to map SPARSE memory, since we need * byte/short access.) */ #if defined(__alpha__) +#if XSERVER_LIBPCIACCESS +#error "libpciaccess does not support the necessary sparse access" +/* XXX Maybe just shift and mask in software and use the single dense map */ +#else mmioFlags |= VIDMEM_SPARSE; #endif +#endif #ifdef SISDUALHEAD - if(pSiS->DualHeadMode) { + if (pSiS->DualHeadMode) { pSiSEnt->MapCountIOBase++; - if(!(pSiSEnt->IOBase)) { + if (!(pSiSEnt->IOBase)) { /* Only map if not mapped previously */ +#if XSERVER_LIBPCIACCESS + err = pci_device_map_range(pSiS->PciInfo, + pSiS->IOAddress, (pSiS->mmioSize * 1024), + PCI_DEV_MAP_FLAG_WRITABLE, &vaddr); + if(err) + pSiSEnt->IOBase = NULL; + else + pSiSEnt->IOBase = vaddr; +#else pSiSEnt->IOBase = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, - pSiS->PciTag, pSiS->IOAddress, (pSiS->mmioSize * 1024)); + pSiS->PciTag, pSiS->IOAddress, (pSiS->mmioSize * 1024)); +#endif } - pSiS->IOBase = pSiSEnt->IOBase; - } else + return pSiSEnt->IOBase; + } #endif - pSiS->IOBase = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, + +#if XSERVER_LIBPCIACCESS + if(pci_device_map_range(pSiS->PciInfo, + pSiS->IOAddress, (pSiS->mmioSize * 1024), + PCI_DEV_MAP_FLAG_WRITABLE, &vaddr)) + return NULL; + return vaddr; +#else + return xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pSiS->PciTag, pSiS->IOAddress, (pSiS->mmioSize * 1024)); +#endif +} - if(pSiS->IOBase == NULL) { - SISErrorLog(pScrn, "Could not map MMIO area\n"); - return FALSE; +static UChar *SISMapMem_fb(SISPtr pSiS) +{ + UChar *Base; +#ifdef SISDUALHEAD + SISEntPtr pSiSEnt = pSiS->entityPrivate; +#endif +#if XSERVER_LIBPCIACCESS + void *vaddr; +#endif + +#ifdef SISDUALHEAD + if(pSiS->DualHeadMode) { + pSiSEnt->MapCountFbBase++; + if(!(pSiSEnt->FbBase)) { /* Only map if not mapped previously */ +#if XSERVER_LIBPCIACCESS + if(pci_device_map_range(pSiS->PciInfo, + pSiS->realFbAddress, pSiS->FbMapSize, + PCI_DEV_MAP_FLAG_WRITABLE, &vaddr)) + Base = NULL; + else + Base = vaddr; + pSiSEnt->FbBase = pSiSEnt->RealFbBase = Base; +#else + Base = pSiSEnt->FbBase = pSiSEnt->RealFbBase = + xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER, + pSiS->PciTag, (ULong)pSiS->realFbAddress, + pSiS->FbMapSize); +#endif + } else { + Base = pSiSEnt->FbBase; + } + /* Adapt FbBase (for DHM and SiS76x UMA skipping; dhmOffset is 0 otherwise) */ + if (Base) + Base += pSiS->dhmOffset; + return Base; } +#endif + +#if XSERVER_LIBPCIACCESS + if(pci_device_map_range(pSiS->PciInfo, + pSiS->realFbAddress, pSiS->FbMapSize, + PCI_DEV_MAP_FLAG_WRITABLE, &vaddr)) + return NULL; + Base = vaddr; /* avoid gcc warnings for map((void **)&Base) */ +#else + Base = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER, + pSiS->PciTag, (ULong)pSiS->realFbAddress, + pSiS->FbMapSize); + if (Base == NULL) + return NULL; +#endif + return Base + pSiS->dhmOffset; +} #ifdef __alpha__ +static UChar *SISMapMem_dense(SISPtr pSiS) +{ +#ifdef SISDUALHEAD + SISEntPtr pSiSEnt = pSiS->entityPrivate; +#endif + /* * for Alpha, we need to map DENSE memory as well, for * setting CPUToScreenColorExpandBase. @@ -7254,38 +7425,27 @@ SISMapMem(ScrnInfoPtr pScrn) #endif pSiS->IOBaseDense = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO, pSiS->PciTag, pSiS->IOAddress, (pSiS->mmioSize * 1024)); +} +#endif /* __alpha__ */ - if(pSiS->IOBaseDense == NULL) { +static Bool +SISMapMem(ScrnInfoPtr pScrn) +{ + SISPtr pSiS = SISPTR(pScrn); + + if((pSiS->IOBase = SISMapMem_mmio(pSiS)) == NULL) { + SISErrorLog(pScrn, "Could not map MMIO area\n"); + return FALSE; + } + +#ifdef __alpha__ + if((pSiS->IOBaseDense == SISMapMem_dense(pSiS)) == NULL) { SISErrorLog(pScrn, "Could not map MMIO dense area\n"); return FALSE; } #endif /* __alpha__ */ -#ifdef SISDUALHEAD - if(pSiS->DualHeadMode) { - pSiSEnt->MapCountFbBase++; - if(!(pSiSEnt->FbBase)) { - /* Only map if not mapped previously */ - pSiSEnt->FbBase = pSiSEnt->RealFbBase = - xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER, - pSiS->PciTag, (ULong)pSiS->realFbAddress, - pSiS->FbMapSize); - } - pSiS->FbBase = pSiS->RealFbBase = pSiSEnt->FbBase; - /* Adapt FbBase (for DHM and SiS76x UMA skipping; dhmOffset is 0 otherwise) */ - pSiS->FbBase += pSiS->dhmOffset; - } else { -#endif - pSiS->FbBase = pSiS->RealFbBase = - xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER, - pSiS->PciTag, (ULong)pSiS->realFbAddress, - pSiS->FbMapSize); - pSiS->FbBase += pSiS->dhmOffset; -#ifdef SISDUALHEAD - } -#endif - - if(pSiS->FbBase == NULL) { + if((pSiS->FbBase = pSiS->RealFbBase = SISMapMem_fb(pSiS)) == NULL) { SISErrorLog(pScrn, "Could not map framebuffer area\n"); return FALSE; } @@ -7302,6 +7462,74 @@ SISMapMem(ScrnInfoPtr pScrn) * Unmap the framebuffer and MMIO memory. */ +#if XSERVER_LIBPCIACCESS + +static Bool +SISUnmapMem(ScrnInfoPtr pScrn) +{ + SISPtr pSiS = SISPTR(pScrn); + +#ifdef SISDUALHEAD + /* + * In dual head mode, we must not unmap if the other head still + * assumes memory as mapped + */ + if(pSiS->DualHeadMode) { + SISEntPtr pSiSEnt = pSiS->entityPrivate; + + if(pSiSEnt->MapCountIOBase) { + pSiSEnt->MapCountIOBase--; + if((pSiSEnt->MapCountIOBase == 0) || (pSiSEnt->forceUnmapIOBase)) { + pci_device_unmap_range(pSiS->PciInfo, + pSiSEnt->IOBase, pSiS->mmioSize * 1024); + pSiSEnt->IOBase = NULL; + pSiSEnt->MapCountIOBase = 0; + pSiSEnt->forceUnmapIOBase = FALSE; + } + pSiS->IOBase = NULL; + } +#ifdef __alpha__ +#error "Alpha not supported" +#endif /* __alpha__ */ + if(pSiSEnt->MapCountFbBase) { + pSiSEnt->MapCountFbBase--; + if((pSiSEnt->MapCountFbBase == 0) || (pSiSEnt->forceUnmapFbBase)) { + pci_device_unmap_range(pSiS->PciInfo, + pSiSEnt->RealFbBase, pSiS->FbMapSize); + pSiSEnt->FbBase = pSiSEnt->RealFbBase = NULL; + pSiSEnt->MapCountFbBase = 0; + pSiSEnt->forceUnmapFbBase = FALSE; + } + pSiS->FbBase = pSiS->RealFbBase = NULL; + } + } else { + pci_device_unmap_range(pSiS->PciInfo, + pSiS->IOBase, pSiS->mmioSize * 1024); + pSiS->IOBase = NULL; +#ifdef __alpha__ + pci_device_unmap_range(pSiS->PciInfo, + pSiS->IOBaseDense, pSiS->mmioSize * 1024); + pSiS->IOBaseDense = NULL; +#endif + pci_device_unmap_range(pSiS->PciInfo, + pSiS->RealFbBase, pSiS->FbMapSize); + pSiS->FbBase = pSiS->RealFbBase = NULL; + } +#else + pci_device_unmap_range(pSiS->PciInfo, pSiS->IOBase, pSiS->mmioSize * 1024); + pSiS->IOBase = NULL; +#ifdef __alpha__ + pci_device_unmap_range(pSiS->PciInfo, + pSiS->IOBaseDense, pSiS->mmioSize * 1024); + pSiS->IOBaseDense = NULL; +#endif + pci_device_unmap_range(pSiS->PciInfo, pSiS->RealFbBase, pSiS->FbMapSize); + pSiS->FbBase = pSiS->RealFbBase = NULL; +#endif /* SISDUALHEAD */ + return TRUE; +} + +#else static Bool SISUnmapMem(ScrnInfoPtr pScrn) { @@ -7363,6 +7591,7 @@ SISUnmapMem(ScrnInfoPtr pScrn) #endif return TRUE; } +#endif /* XSERVER_LIBPCIACCESS */ /* * This function saves the video state. @@ -7847,7 +8076,7 @@ SiSRestore_SiSFB_TVParms(ScrnInfoPtr pSc if(!pSiS->sisfb_tvposvalid) return; if(!(pSiS->sisfbdevname[0])) return; - if((fd = open(pSiS->sisfbdevname, 'r')) != -1) { + if((fd = open(pSiS->sisfbdevname, O_RDWR)) != -1) { parm = (CARD32)((pSiS->sisfb_tvxpos << 16) | (pSiS->sisfb_tvypos & 0xffff)); ioctl(fd, SISFB_SET_TVPOSOFFSET, &parm); close(fd); @@ -14083,3 +14312,44 @@ sisRestoreExtRegisterLock(SISPtr pSiS, U #endif } +#if XSERVER_LIBPCIACCESS + +CARD8 +sisPciReadByte(struct pci_device *pdev, int offset) +{ + uint8_t word; + if (pci_device_cfg_read_u8(pdev, &word, offset) != 0) + word = ~0; + return word; +} + +CARD16 +sisPciReadWord(struct pci_device *pdev, int offset) +{ + uint16_t word; + if (pci_device_cfg_read_u16(pdev, &word, offset) != 0) + word = ~0; + return word; +} + +CARD32 +sisPciReadLong(struct pci_device *pdev, int offset) +{ + uint32_t word; + if (pci_device_cfg_read_u32(pdev, &word, offset) != 0) + word = ~0; + return word; +} + +void +sisPciWriteByte(struct pci_device *pdev, int offset, unsigned char data) +{ + pci_device_cfg_write_u8(pdev, data, offset); +} + +void +sisPciWriteLong(struct pci_device *pdev, int offset, CARD32 data) +{ + pci_device_cfg_write_u32(pdev, data, offset); +} +#endif Only in xf86-video-sis-0.9.3-4.z1/src: sis_drv.la diff -urp -X dontdiff xf86-video-sis-0.9.3-4/src/sis.h xf86-video-sis-0.9.3-4.z1/src/sis.h --- xf86-video-sis-0.9.3-4/src/sis.h 2006-11-30 06:09:43.000000000 -0800 +++ xf86-video-sis-0.9.3-4.z1/src/sis.h 2007-12-14 19:06:34.000000000 -0800 @@ -74,6 +74,7 @@ #include "xf86Pci.h" #include "xf86Priv.h" #include "xf86_OSproc.h" +#include "xf86_OSlib.h" /* usleep */ #include "xf86Resources.h" #include "xf86.h" #include "xf86PciInfo.h" @@ -87,14 +88,36 @@ #ifdef XORG_VERSION_CURRENT #include "xorgVersion.h" #define SISMYSERVERNAME "X.org" + #ifndef XF86_VERSION_NUMERIC #define XF86_VERSION_NUMERIC(major,minor,patch,snap,dummy) \ (((major) * 10000000) + ((minor) * 100000) + ((patch) * 1000) + snap) #define XF86_VERSION_CURRENT XF86_VERSION_NUMERIC(4,3,99,902,0) #endif + +/* + * We use the common wrap technique. If the major is above a certain value, + * or "break point", comparisons are compatible with what they used to be. + * However, if major is below the break point, it's assumed to have "wrapped", + * and is above all old majors. It would probably be 7 if not wrapped to 1. + */ +#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(4,0,0,0,0) /* wrapped */ + +#define SISISXORG6899900 +#define SISHAVECREATEBUSID + +#else /* not wrapped, safe to compare with legacy numeric */ + #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(6,8,99,900,0) #define SISISXORG6899900 #endif +#define SISHAVECREATEBUSID +#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(6,7,99,1,0) +extern char *DRICreatePCIBusID(pciVideoPtr PciInfo); +#endif + +#endif /* wrapped or not */ + #if 0 #ifdef HaveDriverFuncs #define SIS_HAVE_DRIVER_FUNC @@ -102,9 +125,13 @@ #define SIS_HaveDriverFuncs HaveDriverFuncs #endif #endif + #else #include "xf86Version.h" #define SISMYSERVERNAME "XFree86" +# if XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,4,99,9,0) +# define SISHAVECREATEBUSID +# endif #endif #define SIS_NAME "SIS" @@ -166,6 +193,11 @@ #include "vgatypes.h" #include "vstruct.h" +#include "xorg-server.h" +#if XSERVER_LIBPCIACCESS +#include +#endif + #undef SISHAVEDRMWRITE #undef SISNEWDRI #ifdef XF86DRI @@ -265,19 +297,58 @@ #endif #endif -#if 0 /* Perhaps for future use */ -#if 1 -#define SIS_PCI_BUS(a) (a)->bus -#define SIS_PCI_DEVICE(a) (a)->device +#define SIS_PCI_RESIDX_FB 0 /* PCI resource 0: framebuffer */ +#define SIS_PCI_RESIDX_IO 1 /* PCI resource 1: I/O */ +#define SIS_PCI_FBPHYS(p) SIS_PCI_RES(p, SIS_PCI_RESIDX_FB) +#define SIS_PCI_IOPHYS(p) SIS_PCI_RES(p, SIS_PCI_RESIDX_IO) + +#if XSERVER_LIBPCIACCESS + +#define SIS_PCI_RES(p,n) ((p)->regions[n].base_addr) +#define SIS_PCI_IOPORTS(p) ((p)->regions[2].base_addr) +#define SIS_PCI_BUS(a) (((a)->domain << 8) | (a)->bus) +#define SIS_PCI_DEVICE(a) (a)->dev #define SIS_PCI_FUNC(a) (a)->func -#define SIS_PCI_TAG(a) pciTag((a)->bus, (a)->device, (a)->func); +#define SIS_PCI_VENDOR_ID(p) ((p)->vendor_id) +#define SIS_PCI_DEVICE_ID(p) ((p)->device_id) +#define SIS_PCI_CHIP_REV(p) ((p)->revision) +#define SIS_PCI_SUBVEND_ID(p) ((p)->subvendor_id) +#define SIS_PCI_SUBDEV_ID(p) ((p)->subdevice_id) +#define SIS_PCI_READ_BYTE(pdev,off) sisPciReadByte(pdev, off) +#define SIS_PCI_READ_WORD_PR(priv,off) sisPciReadWord((priv)->pdev, off) +#define SIS_PCI_READ_LONG(pdev,off) sisPciReadLong(pdev, off) +#define SIS_PCI_READ_LONG_PR(priv,off) sisPciReadLong((priv)->pdev, off) +#define SIS_PCI_WRITE_BYTE_PR(priv,off,data) sisPciWriteByte((priv)->pdev, off, data) +#define SIS_PCI_WRITE_LONG(pdev,off,data) sisPciWriteLong(pdev, off, data) +#define SIS_PCI_WRITE_LONG_PR(priv,off,data) sisPciWriteLong((priv)->pdev, off, data) + +CARD8 sisPciReadByte(struct pci_device *pdev, int offset); +CARD16 sisPciReadWord(struct pci_device *pdev, int offset); +CARD32 sisPciReadLong(struct pci_device *pdev, int offset); +void sisPciWriteByte(struct pci_device *pdev, int offset, unsigned char data); +void sisPciWriteLong(struct pci_device *pdev, int offset, CARD32 data); + #else -#define SIS_PCI_BUS(a) (a)->pciid.bus -#define SIS_PCI_DEVICE(a) (a)->pciid.device -#define SIS_PCI_FUNC(a) (a)->pciid.func -#define SIS_PCI_TAG(a) pciTag(&((a)->pciid)); -#endif -#endif + +#define SIS_PCI_RES(p,n) ((p)->memBase[n]) +#define SIS_PCI_IOPORTS(p) ((p)->ioBase[2]) +#define SIS_PCI_BUS(a) (((pciConfigPtr)(a)->thisCard)->busnum) +#define SIS_PCI_DEVICE(a) (((pciConfigPtr)(a)->thisCard)->devnum) +#define SIS_PCI_FUNC(a) (((pciConfigPtr)(a)->thisCard)->funcnum) +#define SIS_PCI_VENDOR_ID(p) ((p)->vendor) +#define SIS_PCI_DEVICE_ID(p) ((p)->chipType) +#define SIS_PCI_CHIP_REV(p) ((p)->chipRev) +#define SIS_PCI_SUBVEND_ID(p) ((p)->subsysVendor) +#define SIS_PCI_SUBDEV_ID(p) ((p)->subsysCard) +#define SIS_PCI_READ_BYTE(pdev,off) pciReadByte(0, off) +#define SIS_PCI_READ_WORD_PR(priv,off) pciReadWord(0, off) +#define SIS_PCI_READ_LONG(pdev,off) pciReadLong(0, off) +#define SIS_PCI_READ_LONG_PR(priv,off) pciReadLong(0, off) +#define SIS_PCI_WRITE_BYTE_PR(priv,off,data) pciWriteByte(0, off, data) +#define SIS_PCI_WRITE_LONG(pdev,off,data) pciWriteLong(0, off, data) +#define SIS_PCI_WRITE_LONG_PR(priv,off,data) pciWriteLong(0, off, data) + +#endif /* XSERVER_LIBPCIACCESS */ #ifdef TWDEBUG #define SISVERBLEVEL 3 @@ -846,10 +917,6 @@ typedef struct { int DSTN, FSTN; Bool XvOnCRT2; int maxUsedClock; /* Max used pixelclock on master head */ - ULong masterFbAddress; /* Framebuffer addresses and sizes */ - ULong masterFbSize; - ULong slaveFbAddress; - ULong slaveFbSize; UChar *FbBase; /* VRAM linear address */ UChar *RealFbBase; /* Real VRAM linear address (for DHM, SiS76x UMA skipping) */ UChar *IOBase; /* MMIO linear address */ @@ -949,9 +1016,13 @@ typedef struct _region { typedef struct { ScrnInfoPtr pScrn; +#if XSERVER_LIBPCIACCESS + struct pci_device *PciInfo; +#else pciVideoPtr PciInfo; - int PciBus, PciDevice, PciFunc; PCITAG PciTag; +#endif + int PciBus, PciDevice, PciFunc; EntityInfoPtr pEnt; int Chipset; unsigned char ChipType; Only in xf86-video-sis-0.9.3-4.z1/src: .sis.h.swp diff -urp -X dontdiff xf86-video-sis-0.9.3-4/src/sis_setup.c xf86-video-sis-0.9.3-4.z1/src/sis_setup.c --- xf86-video-sis-0.9.3-4/src/sis_setup.c 2006-11-30 06:09:43.000000000 -0800 +++ xf86-video-sis-0.9.3-4.z1/src/sis_setup.c 2007-12-07 21:05:00.000000000 -0800 @@ -113,7 +113,9 @@ sisOldSetup(ScrnInfoPtr pScrn) #if 0 UChar newsr13, newsr28, newsr29; #endif +#if !defined(XSERVER_LIBPCIACCESS) /* XXX FIXME xf86GetPciConfigInfo */ pciConfigPtr pdptr, *systemPCIdevices = NULL; +#endif if(pSiS->oldChipset <= OC_SIS6225) { inSISIDXREG(SISSR, 0x0F, temp); @@ -204,6 +206,7 @@ sisOldSetup(ScrnInfoPtr pScrn) } pSiS->Flags &= ~(ESS137xPRESENT); +#if !defined(XSERVER_LIBPCIACCESS) /* XXX FIXME xf86GetPciConfigInfo */ if(pSiS->Chipset == PCI_CHIP_SIS530) { if(pSiS->oldChipset == OC_SIS530A) { if((systemPCIdevices = xf86GetPciConfigInfo())) { @@ -224,6 +227,7 @@ sisOldSetup(ScrnInfoPtr pScrn) } } } +#endif pSiS->Flags &= ~(SECRETFLAG); if(pSiS->oldChipset >= OC_SIS5597) { @@ -289,20 +293,20 @@ sis300Setup(ScrnInfoPtr pScrn) case PCI_CHIP_SIS540: case PCI_CHIP_SIS630: pSiS->IsAGPCard = TRUE; - pciconfig = pciReadByte(0x00000000, 0x63); + pciconfig = SIS_PCI_READ_BYTE(pSiS->PciInfo, 0x63); if(pciconfig & 0x80) { pScrn->videoRam = (1 << (((pciconfig & 0x70) >> 4) + 21)) / 1024; pSiS->BusWidth = 64; - pciconfig = pciReadByte(0x00000000, 0x64); + pciconfig = SIS_PCI_READ_BYTE(pSiS->PciInfo, 0x64); if((pciconfig & 0x30) == 0x30) { pSiS->BusWidth = 128; pScrn->videoRam <<= 1; } - ramtype = pciReadByte(0x00000000,0x65); + ramtype = SIS_PCI_READ_BYTE(pSiS->PciInfo, 0x65); ramtype &= 0x03; xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Shared Memory Area is on DIMM%d\n", ramtype); - ramtype = pciReadByte(0x00000000,(0x60 + ramtype)); + ramtype = SIS_PCI_READ_BYTE(pSiS->PciInfo, (0x60 + ramtype)); if(ramtype & 0x80) ramtype = 9; else ramtype = 4; pSiS->UMAsize = pScrn->videoRam; @@ -568,7 +572,7 @@ sis550Setup(ScrnInfoPtr pScrn) /* UMA - shared fb */ pScrn->videoRam = 0; - pciconfig = pciReadByte(0x00000000, 0x4c); + pciconfig = SIS_PCI_READ_BYTE(pSiS->PciInfo, 0x4c); if(pciconfig & 0xe0) { pScrn->videoRam = (1 << (((pciconfig & 0xe0) >> 5) - 2)) * 32768; pSiS->ChipFlags |= SiSCF_760UMA; @@ -580,7 +584,7 @@ sis550Setup(ScrnInfoPtr pScrn) } /* LFB - local framebuffer: PCI reg hold total RAM (but configurable in BIOS) */ - pciconfig = pciReadByte(0x00000800, 0xcd); + pciconfig = SIS_PCI_READ_BYTE(pSiS->PciInfo, 0xcd); pciconfig = (pciconfig >> 1) & 0x03; i = 0; if(pciconfig == 0x01) i = 32768; @@ -631,7 +635,7 @@ sis550Setup(ScrnInfoPtr pScrn) dimmnum = 3; } - pciconfig = pciReadByte(0x00000000, 0x64); + pciconfig = SIS_PCI_READ_BYTE(pSiS->PciInfo, 0x64); if(pciconfig & 0x80) { pScrn->videoRam = (1 << (((pciconfig & 0x70) >> 4) - 1)) * 32768; pSiS->UMAsize = pScrn->videoRam; @@ -643,7 +647,7 @@ sis550Setup(ScrnInfoPtr pScrn) pSiS->BusWidth = 64; for(i = 0; i <= (dimmnum - 1); i++) { if(pciconfig & (1 << i)) { - temp = pciReadByte(0x00000000, 0x60 + i); + temp = SIS_PCI_READ_BYTE(pSiS->PciInfo, 0x60 + i); xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "DIMM%d is %s SDRAM\n", i, (temp & 0x40) ? "DDR" : "SDR"); @@ -652,7 +656,7 @@ sis550Setup(ScrnInfoPtr pScrn) "DIMM%d is not installed\n", i); } } - pciconfig = pciReadByte(0x00000000, 0x7c); + pciconfig = SIS_PCI_READ_BYTE(pSiS->PciInfo, 0x7c); ramtype = (pciconfig & 0x02) ? 8 : 4; alldone = TRUE; } @@ -662,14 +666,14 @@ sis550Setup(ScrnInfoPtr pScrn) } else if(pSiS->Chipset == PCI_CHIP_SIS650) { - pciconfig = pciReadByte(0x00000000, 0x64); + pciconfig = SIS_PCI_READ_BYTE(pSiS->PciInfo, 0x64); if(pciconfig & 0x80) { pScrn->videoRam = (1 << (((pciconfig & 0x70) >> 4) + 22)) / 1024; pSiS->UMAsize = pScrn->videoRam; pSiS->BusWidth = 64; for(i=0; i<=3; i++) { if(pciconfig & (1 << i)) { - temp = pciReadByte(0x00000000, 0x60 + i); + temp = SIS_PCI_READ_BYTE(pSiS->PciInfo, 0x60 + i); xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "DIMM%d is %s SDRAM\n", i, (temp & 0x40) ? "DDR" : "SDR"); @@ -678,7 +682,7 @@ sis550Setup(ScrnInfoPtr pScrn) "DIMM%d is not installed\n", i); } } - pciconfig = pciReadByte(0x00000000, 0x7c); + pciconfig = SIS_PCI_READ_BYTE(pSiS->PciInfo, 0x7c); if(pciconfig & 0x02) ramtype = 8; else ramtype = 4; alldone = TRUE; @@ -686,12 +690,12 @@ sis550Setup(ScrnInfoPtr pScrn) } else { - pciconfig = pciReadByte(0x00000000, 0x63); + pciconfig = SIS_PCI_READ_BYTE(pSiS->PciInfo, 0x63); if(pciconfig & 0x80) { pScrn->videoRam = (1 << (((pciconfig & 0x70) >> 4) + 21)) / 1024; pSiS->UMAsize = pScrn->videoRam; pSiS->BusWidth = 64; - ramtype = pciReadByte(0x00000000,0x65); + ramtype = SIS_PCI_READ_BYTE(pSiS->PciInfo, 0x65); ramtype &= 0x01; xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Shared Memory Area is on DIMM%d\n", ramtype); diff -urp -X dontdiff xf86-video-sis-0.9.3-4/src/sis_vga.c xf86-video-sis-0.9.3-4.z1/src/sis_vga.c --- xf86-video-sis-0.9.3-4/src/sis_vga.c 2006-11-30 06:09:43.000000000 -0800 +++ xf86-video-sis-0.9.3-4.z1/src/sis_vga.c 2007-12-07 21:14:41.000000000 -0800 @@ -1717,8 +1717,17 @@ SiSVGAMapMem(ScrnInfoPtr pScrn) if(pSiS->VGAMapPhys == 0) pSiS->VGAMapPhys = 0xA0000; #if XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,3,0,0,0) +#if XSERVER_LIBPCIACCESS + /* XXX This is cacheable, right? Right? */ + if(pci_device_map_range(pSiS->PciInfo, pSiS->VGAMapPhys, pSiS->VGAMapSize, + PCI_DEV_MAP_FLAG_WRITABLE|PCI_DEV_MAP_FLAG_CACHABLE, + &pSiS->VGAMemBase)) { + return FALSE; + } +#else pSiS->VGAMemBase = xf86MapDomainMemory(pScrn->scrnIndex, VIDMEM_MMIO_32BIT, pSiS->PciTag, pSiS->VGAMapPhys, pSiS->VGAMapSize); +#endif #else pSiS->VGAMemBase = xf86MapVidMem(pScrn->scrnIndex, VIDMEM_MMIO_32BIT, pSiS->VGAMapPhys, pSiS->VGAMapSize); @@ -1734,7 +1743,11 @@ SiSVGAUnmapMem(ScrnInfoPtr pScrn) if(pSiS->VGAMemBase == NULL) return; +#if XSERVER_LIBPCIACCESS + pci_device_unmap_range(pSiS->PciInfo, pSiS->VGAMemBase, pSiS->VGAMapSize); +#else xf86UnMapVidMem(pScrn->scrnIndex, pSiS->VGAMemBase, pSiS->VGAMapSize); +#endif pSiS->VGAMemBase = NULL; } #endif diff -urp -X dontdiff xf86-video-sis-0.9.3-4/src/vstruct.h xf86-video-sis-0.9.3-4.z1/src/vstruct.h --- xf86-video-sis-0.9.3-4/src/vstruct.h 2006-11-30 06:09:43.000000000 -0800 +++ xf86-video-sis-0.9.3-4.z1/src/vstruct.h 2007-12-07 19:06:54.000000000 -0800 @@ -238,12 +238,16 @@ struct SiS_Private { unsigned char ChipType; unsigned char ChipRevision; -#ifdef SIS_XORG_XF86 +#if defined(XSERVER_LIBPCIACCESS) + struct pci_device *pdev; +#else +#if defined(SIS_XORG_XF86) PCITAG PciTag; #endif #ifdef SIS_LINUX_KERNEL void *ivideo; #endif +#endif unsigned char *VirtualRomBase; BOOLEAN UseROM; #ifdef SIS_LINUX_KERNEL